Fundamental Limits for the MOSFET Conduction Channel Length Taking the Real Profile of the Barrier Potential into Account

Authors

  • M.V. Strikha Taras Shevchenko National University of Kyiv, Faculty of Radiophysics, Electronics, and Computer Systems
  • A.I. Kurchak V.E. Lashkaryov Institute of Semiconductor Physics, Nat. Acad. of Sci. of Ukraine

DOI:

https://doi.org/10.15407/ujpe66.7.625

Keywords:

metal-oxide-semiconductor field-effect transistor, minimum channel length, barrier tunneling

Abstract

The minimal length of the channel in the MOSFET, which is the principal device of modern electronics, has been estimated. The account of the real potential behavior in the channel demonstrates that, when some voltage is applied to the drain, electrons tunnel through a region that is essentially shorter than the physical channel length L. Therefore, the estimation of the minimal channel length in the Si-based MOSFET, which is available in the literature (Lmin ≈ 1.2 nm), turns out substantially lowered. This discrepancy explains why, after having reached a working channel length of 5 nm, the value of 3 nm, which had been announced long ago, had not been achieved yet providing a proper level of the transistor functionality. The estimations made in this work confirm that the fundamental limits on the Si-based MOSFET scaling are currently almost reached.

References

M. Lundstrom. Fundamentals of Nanotransistors (World Scientific, 2018). https://doi.org/10.1142/9018

B. Doris, O. Dokumaci, M. Ieong, A. Mocuta, Y. Zhang, T.S. Kanarsky. Extreme scaling with ultra-thin Si channel MOSFETs. Digest Int. Electron Dev. Meet. 267 (2002).

H. Wakabayashi, S. Yamagami, N. Ikezawa, A. Ogura, M. Narihiro. Sub-10-nm Planar-Bulk-CMOS devices using lateral junction control. IEEE Int. J. Electron Dev. Meet. 989 (2003).

Yu.O. Kruglyak, M.V. Strikha. Physics of nanotransistors: 2D electrostatics of MOS and virtual drain model. Sensorna elektronika i mikrosystemni tekhnolohii 16, 19 (2019) (in Ukrainian). https://doi.org/10.18524/1815-7459.2019.3.179347

R. Landauer. Irreversibility and heat generation in the computing process. IBM J. Res. Develop. 5, 183 (1961). https://doi.org/10.1147/rd.53.0183

J.D. Meindl, J.A. Davis. The fundamental limit on binary switching energy for terascale integration (TSI). IEEE J. Solid State Circuits 35, 1515 (2000). https://doi.org/10.1109/4.871332

A.S. Davydov. Quantum Mechanics (Pergamon Press, 1976).

Yu.O. Kruglyak, M.V. Strikha. Physics of nanotransistors: Gate voltage, surface potential, and moving electron charge in a massive MOS structure and in a thin SOI. Sensorna elektronika i mikrosystemni tekhnolohii 16, 5 (2019) (in Ukrainian). https://doi.org/10.18524/1815-7459.2019.2.171224

Yu.O. Kruglyak, M.V. Strikha. Nanotransistor physics: Landauer-Datta-Lundstrom transport model and ballistic MOSFET. Sensorna elektronika i mikrosystemni tekhnolohii 16, 5 (2019) (in Ukrainian).

Yu.O. Kruglyak, M.V. Strikha. Physics of nanotransistors: Electron scattering and MOSFET passage model. Sensorna elektronika i mikrosystemni tekhnolohii 17, 16 (2020) (in Ukrainian). https://doi.org/10.18524/1815-7459.2020.2.205822

A. Majumdar, D.A. Antoniadis. Analysis of carrier transport in short-channel MOSFETs. IEEE Trans. Electron Dev. 61, 351 (2014). https://doi.org/10.1109/TED.2013.2294380

A.D. Franklin, M. Luisier, Shu-Jen Han, G. Tulevski, C.M. Breslin, L. Gignac, M.S. Lundstrom, W. Haensch. Sub-10 nm carbon nanotube transistor. Nano Lett. 12, 758 (2012). https://doi.org/10.1021/nl203701g

R. Mehrotra, Sung Geun Kim, T. Kubis, M. Povolotskyi, M.S. Lundstrom, G. Klimeck. Engineering Nanowire n-MOSFETs at Lg < 8 nm. IEEE Trans. Electron Dev. 60, 2171 (2013). https://doi.org/10.1109/TED.2013.2263806

Published

2021-08-04

How to Cite

Strikha, M., & Kurchak, A. (2021). Fundamental Limits for the MOSFET Conduction Channel Length Taking the Real Profile of the Barrier Potential into Account. Ukrainian Journal of Physics, 66(7), 625. https://doi.org/10.15407/ujpe66.7.625

Issue

Section

Semiconductors and dielectrics